Why Chiplet Interconnects Are Critical to Semiconductor Scaling

As transistors have gotten smaller and smaller, they have approached the boundaries of classical physics and entered the quantum realm; the golden age of Moore is more or less over, and transistors are no longer the easy performance win they once were. Wafers cannot be infinitely large, so with both density and area limits, the only way forward is quantity.

That means placing more computing resources into a system. Increasingly, semiconductor companies are doing this by moving away from a single large, monolithic die and towards multi-die architectures built from smaller chiplets.

However, connecting more devices creates a new engineering challenge: communication.

The limits of monolithic chip design

For decades, semiconductor performance improved largely through transistor scaling. Smaller transistors allowed manufacturers to place more processing capability onto a single piece of silicon.

That approach is becoming harder and more expensive.

Large dies are constrained by manufacturing reticle limits, while defects can reduce yield and increase the cost of producing complex devices. Chiplets offer another route by allowing designers to combine smaller dies within a single package.

Different functions, such as compute, memory and I/O, can also be manufactured using the process technology best suited to each component.

UCIe, or Universal Chiplet Interconnect Express, has been developed as an open standard for connecting these chiplets within a package. Its aim is to support high-bandwidth, low-latency and power-efficient communication between dies from a potentially multi-vendor ecosystem.

Chiplets create an interconnect challenge

Dividing a system into several dies only works when data can move between those dies efficiently.

Without an effective interconnect, bandwidth, latency and power consumption can become system-level bottlenecks. A processor may have more theoretical computing capacity, but that capacity is of limited use when data cannot reach it quickly enough.

This issue is particularly important for artificial intelligence and high-performance computing systems, where processors must continually exchange large quantities of data with accelerators and memory.

The semiconductor industry therefore needs more than additional compute. It needs interconnect technology capable of keeping that compute supplied with data.

How Eliyan is addressing the problem

Eliyan is developing physical-layer interconnect IP for multi-die and chiplet-based systems.

Its NuLink™ die-to-die PHY technology is designed to provide high-bandwidth, low-latency connectivity with strong area and power efficiency. Eliyan offers implementations supporting industry standards including UCIe and Bunch of Wires, alongside its own interconnect technologies.

The company provides solutions for both standard organic packaging and advanced packaging technologies such as silicon interposers and bridges. This gives semiconductor designers different ways to implement chiplet connectivity depending on the cost, density and performance requirements of the system.

Eliyan’s technology originated from an interconnect architecture developed by company founder and CEO Ramin Farjadrad. His work recognised that communication between nearby dies inside a package presents a different electrical environment from conventional chip-to-chip communication and should therefore use a purpose-built PHY architecture.

Interconnects are becoming part of the scaling equation

Chiplets do not remove the physical limitations facing the semiconductor industry. Instead, they change where the primary engineering challenge sits.

The industry is moving from asking how much functionality can fit onto one die to asking how multiple dies can operate as one efficient system.

That makes die-to-die bandwidth, latency, power efficiency and interoperability increasingly important. The interconnect is no longer a supporting component. It is becoming a fundamental part of system performance.

We recently visited Eliyan to speak with Ramin Farjadrad about his background in communications technology, the origins of the company and the growing importance of chiplet interconnects.

Watch the video to hear how Eliyan is approaching one of the defining semiconductor engineering challenges of the multi-die era.