When ipXchange were summoned to the TDK booth to talk with Manfred, we had no idea of the innovation that Mitai had in store for us. The first shock was being told that more than 70% of hardware products fail their first EMC test! Well, with Mitai’s EMC design tool, enabled by recent advances in AI, engineers now have a ‘spell-checker’ for their PCB designs that reduces cost and time to market whilst improving EMC performance!
Mitai is an easy-to-use online tool that allows engineers to upload their PCB design files and receive feedback on aspects of their design that may cause EMC/EMI issues. Mitai then intelligently makes actionable suggestions for improving the design to mitigate against these issues, allowing design engineers to make the required adjustments before EMC testing for certification. This is particularly useful in intensive design schedules where mistakes can easily be missed due to time constraints.
As part of our chat, Manfred shows us an example of what sort of recommendations are given for an example design. One detailed example (shown in some accompanying documentation) highlights the possibility of a parasitic inductance – the unintended result of a greater-than-optimal distance between a capacitor and an IC – reducing filter effectivity in the circuit. The suggested improvement includes reducing this distance between the capacitor and, specifically, the power pins of the IC. That’s some deep insight!
Mitai can be accessed using standard web browsers and is a great EMC checking tool for any commercial design engineer, regardless of your experience level. So, as Manfred suggests, use Mitai to help you in your work and negotiate yourself a wage increase by failing less EMC tests, thus improving your productivity!
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