Codasip RISC-V processors are fully verified and ready for rapid deployment, or to be used as a quick-start base for full customisation using Codasip Studio, an incredible tool for processor design automation. Codasip offers a range of off-the-shelf microarchitectural implementations of the RISC-V standard for virtually any application requirements.
Codasip have created two new FPGA evaluation platforms to test their technology, one for embedded and one for application cores. An example board can be found here for prototyping architectures. These platforms consist of your selected RISC-V processor with a subsystem containing peripherals and AMBA interconnect. A testbench layer includes a clock generator and block RAMs for internal memories and can use some of the FPGA peripherals such as flash memory. Additionally, users receive a Vivado project and bitstream files for their target FPGA board. The platforms include an SDK, software examples, and step-by-step documentation on how to use the peripherals. If known, please select your preferred core from the list below when applying for a board.
(All images sourced from Codasip)
