This board supports Wirepas Connectivity Suite for sub-GHz mesh networking.
Silicon Labs’ EFR32FG13 wireless SoCs combine a low-power microcontroller with a highly integrated radio transceiver that supports sub-GHz and 2.4 GHz proprietary wireless protocols and proprietary modulation schemes including OOK, shaped FSK, and shaped OQPSK with DSSS, with and without FEC.
The EFR32FG13 devices are highly energy efficient, with ultra-fast wakeup times and a scalable power amplifier, making them well suited for battery-operated applications. There is a programmable output up to +19 dBm for the 2.4 GHz band, and sub-GHz frequency options include 915, 868, 490, 434, and 169 MHz bands with programmable output power up to +20 dBm. Both modulation schemes allow for antenna diversity, and the sub-GHz scheme is ideal for proprietary protocols, wireless M-BUS, and Low Power Wide Area Network applications.
The microcontroller side of these devices features a rich set of analogue and digital peripherals, including AES-256/128 Hardware Crypto Accelerator with ECC, SHA-1, SHA-2, ADC, current and voltage DACs, 3 operational amplifiers, 2 analogue comparators, low energy sensor interface, low-energy UART, and up to 32 GPIOs. To support low-power end products, the EFR32FG13 has a wide supply input and energy efficient low power modes, including Deep Sleep mode with a current consumption of 1.3 µA.
Detailed specifications for all EFR32FG13 devices can be found in the product family datasheet.
To evaluate these devices, Silicon Labs has the EFR32FG Wireless SoC Starter Kits, which allow designers to test the technology using Silicon Labs’ Flex SDK, which simplifies proprietary wireless protocol development with extensive examples and support.
This kit comprises two boards:
The first board is a complete reference design for the EFR32FG wireless SoC, with matching networks for 19 dBm output power, a 2.4 GHz PCB antenna, and an SMA connector for the sub-GHz band chosen by the designer. This then plugs into the Wireless Starter Kit Mainboard.
The Wireless Starter Kit Mainboard contains an on-board J-Link debugger with a packet trace interface and a virtual COM port, enabling application development and debugging the attached radio board, as well as external hardware. The Mainboard also contains sensors and peripherals for easy demonstration of some of the EFR32’s many capabilities.
If you want to learn more about the features of this development kit, an example user guide for the 915 MHz version can be found here.
If you have a commercial design that you wish to evaluate the EFR32FG Wireless SoC in, fill out the application form below, specifying which of the 915, 868, 490, 434, and 169 MHz bands you are interested in. If you are aiming to pair this device with Wirepas Connectivity Suite, please note this when filling out the application form. At present, Wirepas only supports sub-GHz profiles for 915 MHz and 865 MHz.
